Trouble understanding Loop Filter in a PLL

by user1505399   Last Updated August 13, 2019 18:25 PM

I'm currently trying to understand the function of a loop filter. But where I'm stuck is that I know the output of the charge pump is a series of current pulses whose width is proportional to the amount of time that the there is mismatch between the reference and the VCO frequency. The problem I find is that each pulse can/should only occur at Fcmp right? So isn't it essentially just PWM? But at the same time, I've heard that the purpose of the loop filter is filter out jitter from the reference. But given that the frequency of the reference is pretty much fixed, I can only see it as an "integrator" or a crude A to D. So, I guess ultimately, what I'm asking is, what am I missing?

Tags : pll control-loop


Answers 1


The purpose of a PLL is to make the VCO track the reference at DC and low modulation frequencies, and to be unaffected by the reference at high modulation frequencies.

You can make a PLL from a PSD, a VCO, and some gain, nothing else is needed. Because the VCO is controlled by frequency, and its phase is detected, that puts an integrator in the loop. This makes the gain infinite at DC, so it tracks the reference, and falls to insignificance at very high frequencies, so rejects the reference modulation.

Adjusting the gain in the loop sets the frequency at which the closed loop gain becomes unity, which sets the loop bandwidth.

Now for the loop filter. Although this loop is stable, tracks at low frequency, rejects at high frequency, it's not very good. Most people who use PLLs want better low frequency tracking and better high frequency rejection than the single integrator of a PLL can achieve.

Neil_UK
Neil_UK
August 13, 2019 18:21 PM

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